This collaboration highlights GUC's commitment to deliver comprehensive and innovative design solutions, enabling customers ...

This funding will support the continued development and demonstration of Strategic Radiation Hardened (SRH) high reliability ...

The partnership between Silvaco and Micon Global is expected to drive Silvaco’s expansion across the EMEA market, leveraging Micon Global’s expertise to enhance client access to Silvaco’s design ...

Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processors, and peripheral devices. Synopsys’ broad MIPI IP ...

The MXL-D-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v2.5. The PHY can be configured as a MIPI ...

Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 serial bus standard where SRIS (Separate RefClk ...

Foundry Sponsored - Single Port Register File compiler - TSMC 110 nm HV_1.5V_5V - Memory optimized for ultra high density and high speed - compiler range up to 20 k Single Port Register File compiler ...

QSPI (Quad Serial Peripheral Interface) VIP can be used to verify Master or Slave device following the QSPI basic protocol.It can work with Verilog HDL environment and works with all Verilog ...

The Inventra™ MCAN2 is a stand-alone controller for a Controller Area Network. It provides an interface between a microprocessor and a CAN bus which carries out all the actions of data ...

MIPI RFFE SPI Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface with SPI overlay, compatible with RFFE 2.1 and SPI Block Guide V04.01 specification. Through ...

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

The 12-bit 5 GSPS DAC IP Core employs a high-performance current steering architecture and provides an optional differential current output or differential voltage output. The bandgap and current ...