The XGPHY is an IP block which simplifies the FPGA integration of Ultra low-latency 10Gbit/s Ethernet connectivity in Xilinx and Altera FPGAs. Ultra-low latency is achieved by using only ... The 10/25 ...

The LogiCORE, 10 Gigabit Ethernet backpane PCS/PMA (10GBASE-KR) has been bundled with the 10G/25G Ethernet PCS/PMA with FEC/Auto-Negotiation (25GBASE-KR). The 10 ...

PROJECT SYNOPSIS: The University of the Virgin Islands (UVI) invites qualified vendors to submit bids for Cisco network equipment, to include delivery, for the St. Croix Nursing Building datacenter.