Design-Reuse9 年
Layer 2 Switch Implementation with Programmable Logic Devices
The paper describes how, with a SOPC (System on a Programmable Chip) architecture embedded with a 32-Bit NIOS-II, a Layer 2 Ethernet switch can be implemented in a FPGA (Field Programmable Gate Array) ...
Design-Reuse10 年
Cavium and XPliant Introduce a Fully Programmable Switch Silicon Family Scaling to 3.2 ...
today introduced the CNX880xx line of Ethernet switch chips featuring the revolutionary XPliant Packet Architecture (patent pending) (“XPA”) – an industry first, delivering no-compromise, high packet ...